Fabricating various metal-oxide-semiconductor (MOS) and bipolar devices, which employ high-quality epitaxial structures or polysilicon contacts to doped single-crystal silicon regions, requires effective pre-process cleaning of the semiconductor surface to remove thin native oxide layers and other contaminants (such as residual metallic and organic impurities).
In particular, undesirable native oxide layers, 5-30 Angstroms, thick are grown on the semiconductor surface as a result of various wet chemical treatments (such as nitric acid or cleaning) and other fabrication procedures, or even exposure to ambient air during wafer handling between process steps. The thickness of these native oxide layers depends upon the source; for example, oxides resulting from ambient exposure are usually less than about 12 Angstroms, chemically grown oxides resulting from exposure to ammonium hydroxide-hydrogen peroxide are usually less than about 17 Angstroms, and oxides resulting from hot nitric acid are usually less than about 30 Angstroms.
The common procedure for removing native oxides (and other contaminants) prior to epitaxial silicon growth processes involves an ex-situ aqueous cleaning (such as the so-called RCA cleaning followed by a final HF dip), followed by an in-situ high-temperature (around 1000.degree. C.-1200.degree. C.) H.sub.2 bake. The wet clean step is expected to remove most of the native oxide and other trace contaminants, while the high-temperature H.sub.2 pre-bake removes residual native oxide left on the semiconductor surface due to ambient exposure. In some applications, the in-situ prebake process may employ an H.sub.2 +HCl process ambient. However, an H.sub.2 +HCl pre-bake is not suitable for low temperature native oxide removal applications due to the possible surface etch-pit problems.
The conventional native-oxide removal procedure has a number of disadvantages and limitations. The wet cleaning processes requires careful control which impacts process reproducibility, and large amounts of chemicals are consumed by the aqueous cleaning process. Moreover, these cleaning chemicals must be disposed of in accordance with increasingly stringent environmental regulations. The H.sub.2 pre-bake processes require relatively high substrate temperatures which cause significant dopant redistribution and undesirable structural modifications in semiconductor devices.
Another disadvantage that is becoming increasingly significant is that the ex-situ wet cleaning steps can not be easily integrated with the subsequent gas-phase processing reactors (such as the reactor for an epitaxial growth process) or vacuum integrated processing cluster tubes. This characteristic of ex-situ cleaning processes can result in fabrication yield reduction due to repeated exposure of wafers to ambient air and insufficient device manufacturing automation.
Moreover, ex-situ cleaning processes do not take advantage of the capabilities of single-wafer integrated in-situ multiprocessing (SWIM) reactors. SWIM is a processing/equipment technology that allows integration of several reactive processing steps in one wafer processing chamber for controlled formations of a desired device microstructure without removing the wafer between various fabrication steps. The SWIM equipment technology and multiprocessing methodology offer enhanced equipment utilization, improved process reproducibility and yield, and reduced chip manufacturing cost.
The conventional multiprocessing methodology employed for an epitaxial multilayer structure involves cycling process parameters--substrate temperature, chamber pressure and process gas flow rates--off and on in transitioning between adjacent process steps (such as depositions of silicon, silicon-germanium alloys, dielectrics and polysilicon). That is, during the transition after the end of a process step, the heating lamp is turned off, and usually, gas flows are shut off and the process chamber is pumped down. When process gases have been shut off and the chamber pumped down, the transition period is completed by turning on the process gases for the subsequent process step and stabilizing chamber pressure and process ambient before turning on the heating lamp to achieve the desired wafer temperature in order to drive the next process step.
This process methodology has a number of possible disadvantages. Thermal cycling from process temperatures to a lamp-off condition may result in thermal shock that can damage the wafer and reduce device fabrication yields. Maintaining the wafer at room temperature during transitions increases the adsorption of residual vacuum impurities (O.sub.2, H.sub.2 O and hydrocarbons). This contaminant adsorption problem is particularly magnified if process gases are shut down and the chamber is pumped down to near vacuum. Vacuum cycling (pumping and venting) is also a significant source of particulate contamination in the process chamber and on the wafer surface.
Taking full advantage of the SWIM technology capabilities requires development of appropriate dry in-situ cleaning processes, which can eliminate the need for wet cleaning processes. In addition, multiprocessing methodologies would be optimized if the adverse effects of process parameter cycling could by minimized.
Thus, an alternative to the conventional ex-situ wet clean/in-situ H.sub.2 bake processes used for such applications as epitaxial growth would be advantageous for both multiwafer (batch) and single-wafer (e.g., SWIM) semiconductor fabrication techniques. A number of dry oxide removal procedures have been proposed as an alternative to ex-situ wet cleaning; however, all have certain limitations or disadvantages.
One alternative native oxide removal procedure is based on heating the semiconductor silicon wafer in an ultra-high vacuum (UHV) process chamber (with a vacuum base pressure of 1.times.10.sup.-8 Torr at substrate temperatures in the range of 800.degree. C. to 1000.degree. C. The temperature for this procedure can be lowered by chemical enhancement to around 625.degree.-700.degree. C. through pre-deposition of a sub-monolayer of germanium on the surface prior to UHV heating. Germanium atoms on the silicon surface can break the silicon-oxygen bonds in native oxide layers, thereby producing new chemical species which sublimate at 625.degree. C. In absence of germanium, the native oxide layers are stable in UHV heating environments well in excess of 750.degree. C. Even at the lower temperature, this procedure requires expensive UHV equipment technology, and is only useful for thin native oxide layers of about 10 Angstroms (compared to typical native oxide thicknesses of up to 30 Angstroms or more).
A second alternative process uses low-energy Ar plasma sputtering at temperatures on the order of 850.degree. C., although process temperatures can be lowered to around 700.degree.-800.degree. C. by using an Ar/H.sub.2 plasma. This procedure requires plasma sputtering deposition equipment, and introduces the potential for residual sputtering-induced damage to the semiconductor surface, which can result in defects in the subsequently grown epitaxial layers.
A third alternative process uses a remote H.sub.2 plasma at relatively low temperatures of around 400.degree. C. or less. This process operates at temperatures low enough to avoid any significant dopant redistribution, but is only useful for thin native oxide layers of less than about 10 Angstroms.
A fourth alternative dry oxide removal process has been proposed that does not necessarily involve complete pre-process removal of the native oxide, but rather its partial removal and suppression of its undesirable effects by deposition of a buffer layer prior to the expitaxial growth process. In connection with plasma-enhanced epitaxial growth of GeSi alloy films at a substrate temperature of 750.degree. C., it has been observed that the addition of a small amount of Ge to Si (and growing a GeSi buffer layer) improves the crystallinity of the grown epitaxial layers. Based on this observation, the crystalline quality of epitaxial Si layers grown on a GeSi buffer layer containing a few percent Ge has been investigated using a plasma deposition process in which GeH.sub.4 is added to the SiH.sub.4 process ambient during the initial stage of epitaxial Si growth in order to make a buffer GeSi layer of about 1000 Angstroms containing 0.6-5 percent Ge. The use of this GeSi buffer layer by addition of a small amount of GeH.sub.4 to SiH.sub.4 during he initial stage of the process results in good-quality Si epitaxy. This effect has been attributed to the possible removal of the native oxide layer by the reaction of Ge+SiO.sub.2 to form volatile GeO.sub.2 and GeO species. This method depends on the growth of a buffer layer containing Ge prior to the epitaxial Si growth in a plasma CVD reactor.
A fifth alternative process uses an electron cyclotron resonance (ECR) plasma of low energy (50-300 eV) H.sub.2 or H.sub.2 +SiH.sub.4. This process accomplishes native oxide removal at relatively low temperatures of about 650.degree. C., mostly by ion-activated chemical reduction reactions with little sputtering action, but requires a dedicated ECR plasma processing reactor. Oxide removal is possibly via formation of SiO and SiH volatile species. The in-situ ECR-H.sub.2 plasma cleaning temperature has been as low as 200.degree. C.
A sixth alternative native oxide removal process is not completely dry, but rather, uses a mixture of HF gas and water vapor. While not aqueous, the HF+H.sub.2 O(vapor) process stream is still highly corrosive, and requires a dedicated process chamber with special reactor wall passivation layers. The HF-vapor etch processes can remove relatively thick layers of oxide; however, it has been shown that they can result in formation of surface residues and particulates.
A seventh alternative native oxide removal technique is based on the use of fluorine-containing species in the process environment. Various non-plasma and plasma processes based on CF.sub.4, NF.sub.3, ClF.sub.3 and GeF.sub.4 have been proposed for silicon surface cleaning and native oxide removal. These processes can remove native oxide layers via plasma and/or thermal activation under the chemical action of the fluorine species. However, these processes generally offer poor etch selectivities with respect to Si such that the native oxide removal process may also remove a significant amount of Si in the exposed regions of the wafer. The fluorine-based chemistries may also result in undesirable Si-F surface bonds causing defective epitaxial layers, and may attack the reactor walls.
Accordingly, a need exists for an in-situ dry cleaning process for removing native oxide and other contaminants which is effective at temperatures sufficiently low (e.g. below 750.degree. C.) to avoid significant dopant redistribution. Preferably, such a process could be integrated with conventional semiconductor processing equipment such as epitaxial growth reactors, as well as the low-pressure chemical-vapor deposition (CVD equipment, and in particular, could be integrated with a multiprocessing methodology that offers reduced process parameter cycling.